In the semiconductor industry, there is an increasing trend toward vertical integration in order to achieve higher packing density.
There are basically three ways of mounting a die on a substrate: a) flip chip (i.e. face down) soldered to the traces of the conductor layer patterned on the substrate, b) face up with contacts on top, and c) face up using wire bonding to connect to an underlying conductor layer patterned on the substrate.
Flip chip techniques can be difficult to use in an embedded environment because inherent limitations on tracks widths and alignment accuracy. Most flip chip techniques require a redistribution layer, which is an extra layer providing contact paths. This adds to cost and complexity of the device. In case b) vias are required through the die to reach the contacts.
It is known to build up three-dimensional (3D) structures that allow lateral components to be integrated into the same vertical package. One example is described in Laminate Based Fan-Out Embedded Die Technologies: The Other Option, Theodore (Ted) G. Tessier, Tanja Karila*, Tuomas Waris*, Mark Dhaenens and David Clark, Flip Chip International, Another is described in AT_S Hermes Newsletter, no. 01, November 2009.
The Hermes process requires extra plating on the die pads to provide a diffusion barrier for the copper interconnect. This adds cost to the die. Also the fine pitch capability discussed in the Hermes project requires complicated and expensive: laser drilling, photoexposure or an extra redistribution layer to achieve the fine pitch capability.
Despite the fact that wire bonding is preferred because wire bonding can connect to the underlying patterned layer without requiring an upper patterned layer to make the connections, and is also applicable to other components, such as resistors, lamination for vertical integration dictates the use of either flip chip or face up technologies since the laminates would squash the wire connections.
U.S. Pat. No. 7,718,471 discloses a vertical arrangement of dies spaced apart by layers of epoxy. The bond pads on the upwardly facing dies are connected to the underlying printed circuit board by wires extending out of the integrated package. This patent requires a separate stack or tower for each column of dies. It does not allow for components placed laterally on the substrate to be integrated into the vertical package.